Director, ASIC Design & Front-End Implementation

Director, ASIC Design & Front-End Implementation

This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work.

We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.

Our culture thrives on finding new and better ways to accelerate what's next.

We know varied backgrounds are valued and succeed here.

We have the flexibility to manage our work and personal needs.

We make bold moves, together, and are a force for good.

If you are looking to stretch and grow your career our culture will embrace you.

Open up opportunities with HPE.

Job Description:

Lead the ASIC Design and Front-End Implementation organization responsible for delivering next-generation networking ASICs that power HPE Networking products and technology roadmaps.

Drive RTL design execution, implementation readiness, design quality, and milestone delivery from architecture through tapeout, silicon bring-up, and product deployment.

Partner closely with Architecture, Verification, Emulation, Software/SDK, Physical Design, Post-Silicon Engineering, Product Management, and Product Marketing to ensure successful execution and alignment with business objectives.

ASIC Design Leadership


* Lead RTL design and microarchitecture teams developing complex networking ASICs.


* Drive design execution from architecture through RTL completion, ensuring performance, power, area (PPA), quality, cost, and schedule targets are met.


* Establish design methodologies, coding standards, and engineering best practices.


* Review and approve key architectural and implementation trade-offs.

Implementation & Tapeout Readiness


* Partner with Physical Design teams to achieve floorplanning, timing closure, power optimization, DFT integration, and tapeout readiness.


* Ensure RTL designs are optimized for implementation, manufacturability, scalability, and production readiness.


* Support issue resolution through implementation, silicon validation, and bring-up.

Cross-Functional Leadership


* Collaborate across Architecture, Verification, Emulation, SDK/Software, Physical Design, Post-Silicon Engineering, Product Management, and Product Marketing.


* Align product requirements, architecture, RTL implementation, verification, software enablement, and deployment plans.


* Lead design reviews, milestone assessments, technical risk evaluations, and issue resolution.

Technology & Product Strategy


* Contribute to ASIC technology strategy and product roadmaps through technical feasibility, cost, performance, and schedule analysis.


* Collaborate with Architecture and Product teams to define future networking ASIC capabilities and competitive...