Principal ASIC Verification Engineer

Principal ASIC Verification Engineer

This role has been designed as ''Onsite' with an expectation that you will primarily work from an HPE office.

Who We Are:

Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work.

We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today's complex world.

Our culture thrives on finding new and better ways to accelerate what's next.

We know varied backgrounds are valued and succeed here.

We have the flexibility to manage our work and personal needs.

We make bold moves, together, and are a force for good.

If you are looking to stretch and grow your career our culture will embrace you.

Open up opportunities with HPE.

Job Description:

Juniper Networks, part of Hewlett Packard Enterprise (HPE) is seeking a highly skilled and experienced Principal ASIC Verification Engineer to join our team.

In this role, you will play a key part in verifying cutting-edge ASIC/SoC designs for networking solutions.

You will collaborate with a world-class engineering team and contribute to the development of industry-leading products.

This role is based full time in Sunnyvale, CA with the expectation that you'll be in the office 2 days per week.

Primary Responsibilities


* Own and drive block-level/subsystem/FullChip verification efforts, from creating test plans to achieving comprehensive coverage closure


* Develop, enhance, and maintain advanced UVM verification environments, including agents, sequences, scoreboards, virtual sequences, and register models.


* Perform constraint-driven random testing, debug complex SoC designs, and ensure functional coverage and assertion goals are met.


* Analyze simulation results using industry-leading simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and debug waveforms to validate design functionality.


* Collaborate with cross-functional teams to identify and resolve issues, ensuring high-quality ASIC/SoC deliverables.

Required Skills and Qualifications


* 12+ years of experience in ASIC/SoC verification with a proven track record of owning verification from test plan to coverage closure.


* Strong expertise in SystemVerilog and UVM methodology, including developing environments from scratch.


* Deep understanding of randomization, constraints, functional coverage, and assertions (SVA).


* Hands-on experience in test planning, coverage analysis, and debugging of complex SoC designs.


* Proficiency with industry-standard simulation tools (e.g., Cadence Xcelium, Synopsys VCS, Mentor Questa) and waveform debugging.

Any combination of the following is a plus


* Experience verifying networking ASICs or router datapath/control blocks, such as packet processing, forwarding engines, or fabric interfaces.


* Familiarity with high-speed ...